Follow

@azonenberg any tips on routing pcie 4 in kicad ? We don't have any fancy field solvers or whatever so all I can go by is random blogs telling me coplanar Waveguide is sufficient. But is it? 8ghz very scary.

@aep I mean CPWG is fine up to a point.

But it's generally not practical to route a CPWG into a BGA (unless you have grounds at exactly the right spot in the ballout) so you'll need to transition from that to microstrip which can be a pain.

And you still have to get the impedance of the CPWG correct.

As far as the connector fingers, there's probably layout guidelines for those available somewhere.

For the general trace geometry (and coupling capacitors, don't neglect that) I can throw some stuff in Sonnet for you no problem. Just send me your stackup info and what size your caps are and I'll try to come up with something reasonable.

@azonenberg there are zero caps on the original board schematics, which I will replicate exactly, just more slots.

Would enormously help if you could send me the routing rules (distance, width, stackup, fills, etc ) to use for pcie 4. I guess I can use oshpark 4 layer, hoping you might already have some rules somewhere.

The OG design geometry looks exactly like kicad, except round traces ( doesn't matter?). it's likely a 6 layer with the pattern fill on the surface being islands (weird)

@aep Oh this is for the backplane, not for an add-in card or motherboard.

Round traces don't matter at these speeds. Copper island fill is not something kicad normally does, and is typically for manufacturability rather than impedance. Unfilled should be fine.

For PCIe gen3/4 you want 85 ohm differential and 42.5 ohm single ended. Did you want to do 4 or 6 layer oshpark stackup? Makes a big difference in design rules since the layer spacing is different.

@azonenberg i didn't know osh can do 6. I think I'd prefer 6 for this so i can have an uninterrupted ground below signal and route power on the inner ones.

@aep It was a recent addition. The one board I've done on that stackup so far (still a WIP, not fabbed) is SGS SPS since I needed a bunch of extra routing layers, but something like SGPPGS is totally doable if you can get away with only two signal layers.

@azonenberg yeah it's really really simple. I'm just overly scared of the 8ghz. All the signals are connector -> via -> connector. And power is just a single 12V distribution.

@azonenberg osh only does ENIG tho. Is this ok? I remember reading coplanar Waveguide should not use ENIG.

@aep Coplanar waveguide has higher sensitivity to plating loss, since more field is in the lateral direction vs vertical. This is only an issue if you have no soldermask over the traces.

If you have soldermask, you will still be sensitive to Df of the soldermask (vs a microstrip, where you mostly care about Df of the substrate). One way to avoid this is by using stripline structures, with the signals on internal layers.

Stripline is probably not a great choice for high speed signals on 6-layer oshpark though, because then you'll have a large via stub (assuming no backdrilling) causing reflections. Better to keep your signals on outer layers to avoid via stubs (i.e. OK to go from 1 to 6, less good to go from 1 to 4, worse to go from 1 to 3).

I think differential microstrip with no outer layer ground plane, similar to the board you showed me, is best.

@azonenberg happy to use whatever you know works. I can do 4 layer too if you only have design rules for that.

@aep I have a 6 layer technology file in Sonnet, just haven't run the numbers for 85 ohm impedance yet since I normally use 100. I'll try and get to that tomorrow.

@azonenberg ugh i just realized the board is too large for my oven. And JLC doesn't have the connectors. So that only leaves pcbway 😫

@aep Does it have to be one big segment? For example, is it possible to split into two halves each with an x16 uplink that have no connections between them?

@aep Also, this sounds like it might be an excuse to get a bigger/better oven :P

@azonenberg yeah maybe. Will have to make new mounting mechanics, since the original board just has 4 screws.

I live in a big city so space is very expensive. Would generally prefer getting rid of all the assembly equipment :/

@azonenberg heya, could you still get me those design rules for osh 6 layer?

Actually I think SATA is 100 ohms and you already have done the math for that. I'm considering SATA because its slower and more tolerant to my inevitable mistakes.

Sign in to participate in the conversation
Mastodon

The social network of the future: No ads, no corporate surveillance, ethical design, and decentralization! Own your data with Mastodon!